“Chinese Chip” Rises – Break through 14nm Node!

In the past month, because of US further sanction against Huawei, the domestic replacement semiconductor has become a hot topic and keywords like “Huawei, TSMC, lithography machine and chip” also lead to heated discussions among people. China, as the largest fabrication base for electronic products in the world, has turned into a driving force for global integrated circuit growth. It is predicted that the compound annual growth rate (CAGR) for global wafer foundry market from 2018 to 2023 will be 4.9%. So, from design to market, which technology does a chip contain? Chipjet will disassemble and analyze the chip industry chain and let you have a comprehensive understanding about it.

What is Chip?

Chip is a small silicon wafer which integrates circuits with functions like operation and memory on it through design, fabrication, packaging and testing technology. Chip is small in size but powerful. For its highly complicated technology, chip, as a result, is referred to as pearl on the crown of human wisdom and the peak of artificiality.

How to fabricate chip?

1. Chip Design

First of all, be clear about chip’s specification and function, and then design the chip according to “Logic Design Diagram” with IC logic symbols.

Finish the effect drawing of circuit diagram with the layout of components based on the logic diagram design circuit.

Design the chip with EDA software: Design Compiler (DC), placement & route (P&R), static timing analysis (STA) signoff and physical verification; then transmit GDS data to FAB and make it into a mask. Expose the mask to UV-light and the corresponding circuitous pattern is obtained.

2. Chip Fabrication

After design process, the fabrication starts. First of all, overlay a layer of thin film on the silicon wafer and apply photoresist on it.Then expose hard light to the photoresist through the mask with circuit diagram.

After that, start metal sputtering and then wash out the photoresist out of the route and metal; a circuit diagram matching the mask forms.  

Repeat the above process to turn the silicon wafer into an IC wafer with thousands of chips on it. Then a chip is born.

3. Chip Packaging and Testing

Before being officially launched on the market, those qualified wafers will be sawed, soldered with wire and packaged to prevent the wafers being damaged or corroded. Besides, the packaged chips will be tested about its function and performance. The chips won’t be launched if they don’t pass the tests.

Break up monopoly-Master 14nm Technology

With the improving fabrication technology of semiconductor, chips is greatly promoted on performance with advanced process. SMIC, which represents the most advanced chip design technology level in mainland China, has already mastered 14nm process technology but hasn’t broken through 7nm. So, how difficult it is to improve from 14nm to 7nm?

In the fabrication technology of chip, fabricating a 7nm chip is equivalent to putting 6.9 billion transistors on a place as large as a fingernail. The greatest obstacle in it is the development of lithography machine and transistor’s structure. As the current lithography technology has reached its limit, the point how to shrink the transistor’s dimension becomes the key factor which decides the development of chips.

Affected by the event of US sanctions against Huawei, the demand of polishing materials in domestic semiconductor industry will keep rising in next few years. In this context, Hubei DingLong Co., Ltd successfully imported the advanced process technology for memory in the first half year, making its subsidiary Hubei Dinghui Microelectronic Material Co., Ltd be one of a few enterprises owning breakthrough experience and ability on advanced process technology in domestic CMP polishing pad industry.

This technology breaks up the foreign monopoly on chemical mechanical polishing (CPM), filling the domestic market vacancy and replacing imported products. Different from those completely mechanical or chemical polishing methods, it is a technique combining chemistry and mechines, which avoids surface damages caused by completely chemical polishing. In this way, surface polishing is achieved with high quality, reaching a balance between chemical etching and mechanical grinding.

At present, Ding Long CMP Process Technology Material Evaluation Center already has industrialization capability for the whole series polishing pads of both the mature process and advanced process. Stably suppling products to integrated circuit enterprises in need of 8 inch and 12 inch in large volumes, it has become the only one 12 inch CMP process material application evaluation center in China. As the mass production technology for polishing pads with 28nm node integrated circuit is getting mature, the company now is challenging the 14nm node with its R&D technology of polishing pads. Based on its breakthrough on advanced process technology, it starts development on products of higher technology.

CMP Polishing Process (Dinghui Microelectronic Application Evaluation Center)

In the future, we will challenge advanced technology nodes and optimal design, letting Chipjet chips be embraced by larger markets in the worldwide. Faced with unknown challenges, we won’t be daunted and still firmly believe the domestic lithography industry will surprise us with its blossom in the near future.

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